In a process for manufacturing a semiconductor device, in general, a photolithography step is performed on a semiconductor substrate a plurality of times. In the photolithography step, a mask pattern for etching a specific portion on the semiconductor substrate or for implanting ions is formed. The mask pattern is formed with a photosensitive material such as a resist.
The photosensitive material is generally applied onto the semiconductor substrate through spin coating. In spin coating, for example, a coating material is dropped onto the center of the rotating semiconductor substrate and the coating material is spread by centrifugal force. Therefore, the coating material is applied also to an outer circumferential portion of the semiconductor substrate. When a beveled portion (a portion inclined as a result of beveling) is formed in the outer circumferential portion of the semiconductor substrate, the coating material is applied also onto the beveled portion.
The mask pattern made of the photosensitive material formed on the outer circumferential portion or the beveled portion as such is broken due to contact in a cassette accommodating the semiconductor substrate or in a semiconductor manufacturing apparatus and becomes a source of generation of particles.
In order to address such a problem, Japanese Patent Application No. 60-283613 (Japanese Patent Laying-Open No. 62-142321) describes an exposure apparatus which exposes to light, only an end portion of a semiconductor substrate having a resist prominence formed at the end portion. Japanese Patent Application No. 10-025183 (Japanese Patent Laying-Open No. 11-214294) describes an edge exposure apparatus which exposes only a peripheral portion of a stepped wafer such as an SOI wafer to light.
When a coating material is applied to a rear surface of a stepped substrate having a step portion (a rib portion projecting from an inner circumferential portion on a rear surface side) formed in an outer circumferential portion as a result of treatment for decrease in thickness of an inner circumferential portion of the semiconductor substrate, the coating material is also applied onto the step portion. The coating material is applied also onto an inner circumferential end surface located on an inner circumferential side in the step portion and a terrace surface (a top surface of the step portion).